Constant Acceleration Test
- Posted by doEEEt Media Group
- On August 7, 2024
- 0
Within mechanical Testing, ALTER laboratory has developed a new capability to perform constant acceleration test.
ATCOS Study: Alternative Test Methods for COTS – Test Planning
- Posted by doEEEt Media Group
- On August 1, 2023
- 0
The ATCOS program is a GSTP program investigating test approaches to substitute component-level tests with board-level tests. In EEE component topology, it covers qualification and screening aspects as well as radiation. Within the study, component-level tests and board-level tests will be executed, and results will be compared to evaluate the adequacy of board-level testing. HALT and HASS aspects have been evaluated and reflected in the proposed test flows.
Material Analysis Techniques for Electronic Components
- Posted by Francisco Javier Aparicio Rebollo
- On May 6, 2022
- 0
Material Analysis is performed to detect and identify the materials used in the manufacturing of semiconductors and microelectronic parts and packages. One particular use of this analysis is the detection of prohibited materials, especially in the lead finish, to identify potential reliability issues such as undesirable whisker growth caused by pure tin finishes. Lead finish validation for every component type to be soldered is essencial to determine the correct soldering profile.
Scanning Acoustic Microscopy (SAM) and X-Ray Tomography
- Posted by doEEEt Media Group
- On April 26, 2022
- 0
The Scanning Acoustic Microscopy (SAM) technique is the most effective and complete non-destructive approach for the detection of critical and latent anomalies within plastic encapsulated parts, either on assembled or non-assembled systems
Thickness Verification. An Introduction on HI-REL
- Posted by Emilio Cano García
- On April 10, 2022
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Coating Thickness Verification
The thickness of metallic coatings is routinely determined by X-ray fluorescence spectrometry. This provides a basis for assessing the quality of coated materials and therefore influences decisions regarding disposition (acceptability) of the coated product as well as control of coating processes.
Design for manufacturing and assembly
- Posted by Mario Rueda Aguilocho
- On March 30, 2022
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Design for manufacturing is based on design rules from manufacturing processes for both the PCB and Electronics assemblers. Some authors prefer to have separate definitions for the PCB Printed Circuit Boards manufacturing by grouping them under different names DFF, Design for Fabrication and DFA, Design for Assembly for just the electronics assembly process.
Frequently Asked Questions (FAQs) – Scanning Acoustic Microscopy
- Posted by doEEEt Media Group
- On February 23, 2022
- 0
Over the years, our experience in CSAM testing has allowed us, among other things, to have conversations with clients who have come to us with questions about our laboratory services.
In ALTER, we are an expert and reliable supplier in the engineering and testing EEE components and equipment for space and other technology markets.
This article reports the importance of X-Ray Tomography, Scanning Acoustic Microscopy (SAM), and Cross Section techniques, and the advantages of their combined use for accurate testing.
Test combination for detecting defects in plastic ICs
- Posted by doEEEt Media Group
- On February 10, 2022
- 0
Importance Of Combining X-Ray Tomography, Scanning Acoustic Microscopy (SAM), And Cross Section Techniques For Electronic Components Inspections
This article reports the importance of X-Ray Tomography, Scanning Acoustic Microscopy (SAM), and Cross Section techniques, and the advantages of their combined use for accurate testing.
What is a C-SAM Inspection?
- Posted by Francisco Javier Aparicio Rebollo
- On January 29, 2022
- 0
Internal (invisible) fabrication and materials defects can critically compromise the performance of encapsulated microelectronics parts. Similarly, accidental constructional failures (missing parts) and counterfeit suppose and non-negligible issue in the current EEE market.
Lidar echo emulator – Near-infrared, visible, and ultraviolet
- Posted by doEEEt Media Group
- On January 21, 2022
- 0
A compact and cost-effective NIR-VIS-UV lidar echo emulator (LEE) was designed and manufactured as a compact breadboard. The LEE is an application-specific optical pulse shaper delivering a short lidar return (echo) in the ns range overlapped with a long lidar return in the µs range with a repetition rate from 100 Hz – 500 Hz. The short echo power levels are in the range from 0.2–200 nW, whereas the long echo powers are from 0.1–25 pW.