Supercapacitors voltage measurements

The voltage measurements were performed with a self-developed setup based on the integrated circuit CY8CKIT-059 from PSoC. The data acquisition was utilized with an Excel script. The measurement setup, including the programming of the script, was developed by Jon-Izkue Rodriguez from WE eiSos.

The power supply we used was the HMP4040 from Rohde & Schwarz. The currents for determining the power dissipation were measured with M252A METRAHit ESPECIAL Current Transformer Connection Multimeter from Gossen-Metrawatt.

We tested a series combination of two SC from WE eiSos

• Capacitor 1: C₁ = 10 F
• Capacitor 2: C₂ = 15 F

This practically constitutes deviations from a theoretical capacitor with a rated capacitance of C_r = 12.5F. For the charging, we used a

• charging voltage V_g = 5.4V
• max. charging current I_c = 2A

We want to underline that combining SC with different rated capacities is inadvisable for reliable circuit design. We only choose this combination for experimental purposes. This setup provides three advantages:

First, this setup provides a significant and reproducible imbalance of around ±0.5 V. We could change the set of capacitors without an intensive search for suitable mismatches. Second, it demonstrates the potential robustness of the EDLC if operated under extreme overvoltage. Although the lifetime was drastically reduced to a few weeks, none of the used SC showed a catastrophic failure. Third, it shows the operation of the individual balancing strategies under extreme conditions.

The chosen capacitors demonstrate the operation of each strategy under extreme imbalance. In practice, capacitance variation is much lower than in this example, even over different production batches. We also studied the self-discharge behavior of each circuit for a period of 24 h. Hereunto, we disconnected the entire balancing circuit from the primary power source after the capacitors were fully charged and balanced. The voltage was again measured with the PSOC CY8CKIT-059.

Based on the measurements, we also assess the circuit’s applicability in stand-alone long-term applications. In that respect, the expression “long-term” describes approximately several days.

Resistor, 1 kΩ Passive Balancing

For the passive balancing, as shown in Figure 2, we used a 0.6 W, 1kΩ (1%) resistance. We have chosen the resistance in favor of a short balancing time rather than a low power loss. The measured voltages V₁ and V₂ and the resulting voltage difference |V₁ – V₂|, given in Figure 7, show a complete balancing after around 600 min. V₁ and V₂ approach V_r asymptotically.

Figure 7: Time-dependent supercapacitor cell voltages V1, V2, and Vg as well as the voltage difference |V1 – V2| (corresponds to ordinate on the right-hand side) as measured for the passive balancing with resistors

The measured balancing time corresponds to the estimation given in section 4.1, t_b = 625 min = 3 ∙ R_b ∙ C = 3 ∙ 1 kΩ ∙ 12.5F. The overall power dissipation (effective leakage current, Iloss) after 12h is 2.8mA ∙ 5.4V ≈ 15 mW. This balancing speed may be sufficiently fast for low-power applications or backup solutions, and the power loss is acceptable. The resistance should be increased for battery-driven (standalone) applications to reduce losses. It is advisable to reduce operating voltage to avoid overvoltage to be safe. The half-life and self-discharge time are estimated with the:

supercapacitor half-life, self-discharge time estimation [16]

Figure 8: Measured self-discharge of supercapacitor balancing circuit with resistors. The graph shows time-dependent cell voltages V1, V2, and Vg and the voltage difference |V1 – V2| (corresponds to ordinate on the right-hand side).

The results of self-discharge measurement, as given in Figure 8, correspond to the estimated half-life self-discharge time of around 130min. The self-discharge time is large enough to consider passive balancing with 1 kΩ as suitable for a standalone solution.

Zener Diode Passive Balancing

As shown in Figure 3, we used the voltage regulator diodes BZX79-B2V7 from NXP Semiconductors for the passive balancing. The results in Figure 9 indicate a complete balancing after around 80min. With the datasheet value of total power dissipation of 500mW, the measured value fits roughly to the theoretical approximation of:

[17]

The overall power dissipation (effective leakage current, I_loss) after 12h is 5mA ∙ 5.4V ≈ 27mW. For lower voltages the power dissipation will be even lower. (The datasheet states: I_loss(1V) = 20μA).

Figure 9: Time dependent supercapacitor cell voltages V1, V2 and Vg as well as the voltage difference |V1 – V2| as measured for the balancing with Zener diode BZX79-B2V7

Due to the strong nonlinear voltage dependence of Zener diodes, the calculation of the self-discharge characteristic is difficult. We may however use the same concept as for t_b^* and introduce a correction factor f to adjust the expression for the half-life self-discharge time. We may estimate that the data sheet value I_loss (1V) = 20μA is in our case about 10 times higher. With f = 10 the theoretical half-life self-discharge time for a stack, balanced with a Zener diode, can be estimated with:

[18]

Figure 10: Measured self-discharge of supercapacitor balancing circuit with Zener diode. Graph shows time-dependent cell voltages V1, V2 and Vg and the voltage difference |V1 – V2| (corresponds to ordinate on the right-hand side).

The results of self-discharge measurement, as given in Figure 10, show that t_loss^* = 1900min roughly fits the actual half-life self-discharge time. Based on the measured self-discharge behavior, we think the circuit could still be suitable for long-term stand-alone applications.

MOSFET Passive Balancing

As shown in Figure 4, the MOSFET-based balancing circuit was implemented with the test board SABMB2 for the MOSFET ALD910022 (Test Board SABMB2) from Advanced Linear Devices. The results in Figure 11 indicate a complete balancing after around 300min. The overall power losses after 12h of 1.5mA ∙ 5.4V ≈ 8mW were about as low as for the Zener diode.

The results of the self-discharge measurement in Figure 15 indicate a half-life self-discharge time of t_loss = 5min. Since we may only speculate about the voltage dependence of current losses at the terminals, we refrain from a mathematical estimation of tloss. We do not consider the circuit suitable for long term standalone applications.

Although the circuit always ensured a balanced charging, the losses via the supply channels are significant. We demonstrated, however, the feedback amplifier might work in principle. It is, in the end, the developer’s responsibility to find the best solutions for his application.

Active Balancing with DC-DC Converter

The evaluation board DC1887A utilizes the buck-boost SC charger and balancer LTC3128 from Analog Devices. It charges the SCs at a preset voltage of 4.2V. The board operates at a supply voltage of 5.5V. The measurement results in Figure 16 indicate a complete balancing after 1.5min. The overall power dissipation after 12 h is 0.1mA ⋅ 5.4V ≈ 0.5mW.

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