RTG4 Radiation Tolerant FPGA Update

Microsemi, a Microchip Company is one of the top market developers of FPGA for the Space market. One of the most recent FPGA they have placed in the market is the RTG4 type, a high-speed radiation-tolerant flash-based FPGA for signal processing applications, manufactured on a low power 65nm process with substantial reliability heritage.

RTG4 FPGAs integrate Microsemi’s fourth-generation flash-based FPGA fabric and high-performance interfaces such as serialization/deserialization (SERDES) on a single chip while maintaining the resistance to radiation-induced configuration upsets in the harshest radiation environments, such as space flight (LEO, MEO, GEO, HEO, deep space), high altitude aviation, medical electronics, and nuclear power plant control.

During 2018 and 2019, the following developments have been added to the RTG4 FPGAs portfolio:

• Low power grade (–L) for RTG4 standard speed (-STD) is already available. This represents a 25% quiescent supply current reduction. 
• QML V and QML Q qualification is completed against SMD 5962-16208. This means RTG4 types can be already ordered to DLA SMD part number. RTG4 FPGAs are now dual marked with SMD number and Microsemi part number.
• Proto level and Development Kits are available.

• Ceramic CG1657 (ceramic grid array, Six Sigma Columns) and ceramic LGA1657 (land grid array, No Solder Termination) packages are available for B, E and V flow flight units. CG1657 daisy chain packages are available as well.
• Ceramic CB1657 (Ceramic Ball Grid Array, For Prototyping Only)
• To expand the current offer of ceramic packages, there is a plan to pursue QML Q and V for Ceramic CQ352 (ceramic Quad Flat Pack) package
  • EM units are currently available, as well as B and E flow flight units.
  • RT4G150 in CQ352 QML Q and QML V qualification in 2020.

Radiation performance

RTG4 FPGAs are immune to radiation-induced changes in configuration, due to the robustness of the flash cells used to connect and configure logic resources and routing tracks. No background scrubbing or reconfiguration of the FPGA is needed in order to mitigate changes in configuration due to radiation effects.

Data errors, due to radiation, are mitigated by hardwired SEU resistant flip-flops in the logic cells and in the math blocks. Single Error Correct Double Error Detect (SECDED) protection is optional for the embedded SRAM (LSRAM and uSRAM) and the DDR memory controllers. This means that if a one-bit error is detected, it will be corrected. Errors of more than one bit are detected only and not corrected. SECDED error signals are brought to the FPGA fabric to allow the user to monitor the status of these protected internal memories. 

Here is a summary of RTG4 FPGAs radiation performance

Microchip’s High-Performance FPGA