Secondary Power Distribution in Satellites

Development, volume, and weight of such power units and power rails contribute to the costs of space missions. At the same time, the power distribution to the modules with low voltages and high currents requires heavy power rails due to large cross-sections or suffers from conduction losses or both.

As DC power is supplied to extended distances from the source, the system bus power is delivered at a much higher bus voltage in order to reduce weight and resistive power loss. System source voltages are commonly a nominal 12V, 28V, 48V, 120V and in some cases 270V.

Power conversion is typically accomplished in multiple stages to reach the final load voltage. Isolation and regulation are two key requirements and may be implemented at different stages depending on system architecture. Although power is lost at each conversion step, it is not practical to deliver the lowest voltages over significant distances due to the high currents and consequent high resistive losses which would be incurred. Designers must balance the advantages and disadvantages of multi-stage power conversion, the tradeoffs of distance, and the need for intermediate voltages to power other circuit elements that often drive the architecture.

The multitude of low-voltage, high current loads and increased system power efficiency requirements make yesterday’s typical design approaches less practical, and design requirements more difficult to achieve.

Traditionally, there are at least two basic design approaches for most power design solutions.

One common solution is a decentralized approach where several isolated DC-DC converters operating directly a space craft power bus (or just one with several outputs), which provide the regulated supply voltages, 1V, 1.5V, 2.5V, 3.3V, 5V, etc., as required by the digital loads.

New digital devices require lower supply voltages and higher operating currents (in the order of 5 to 10A or more). In addition, the new FPGA and ASIC devices are sensitive to voltage variations, which must be maintained within a tight regulation band to ensure proper functionality of the devices. This restriction needs a new method of distributing power where the physical proximity of a power source and the new digital FPGA and ASIC devices must be sufficiently close to ensure an acceptable voltage excursion due to parasitic impedances.

The other popular approach known as distributed power architecture (DPA) is often the power system of choice to ensure the optimum system performance, efficiency and dynamic A basic DPA system typically uses one isolated DC-DC converter operating directly a spacecraft power bus and two or more point of load (POL) converters. The isolated converter supplies an intermediate regulated or unregulated voltage that powers the down-stream non-isolated voltage regulators which provide regulated supply voltages to the digital loads.

The system consists of an intermediate bus converter (IBC) and point of load (POL) regulators. The IBC converts the spacecraft power to a regulated DC voltage, which powers the POL regulators. The IBC is usually placed some distance away and is usually not on the same assembly card as the FGPA/ASIC devices due to cooling and other mechanical considerations. Each POL is placed on a board near the FPGAs or ASICs to minimize parasitic impedances.

Each of the two basic design approaches has its respective pros and cos. Detailed analysis and a trade-off study are needed in order to guarantee that design and program objectives are met. The design system approach selected is generally dependent on:  system efficiency, dynamic performance due to parasitic impedances, size, weight, heat distribution, mechanical layout design, system redundancy requirements, power conversion elements availability, costs and others.