HALT Test for new reliability approach in New Space

ABSTRACT

The target is to assess if a fast-testing methodology such as HALT, already in place in other industries as automotive or defence, could be useful to accelerate validation processes on commercial electronic test boards for New Space missions. This project has been developed to be applied to COTS space boards in a relevant state of maturity in order to detect and analyze weaknesses after a test failure and try to determine the Fundamental Limit of Technology (FLT) for potentially improving the design phase of the boards.

Ten boards, referred to as TOTEM, with more than 2 years of flight heritage in LEO orbits and fully designed with onboard diagnostic measurements, have been tested in stressful environmental conditions, such as temperature variations, multi-axis broad-spectrum vibrations, and thermal cycling.

The following preliminary phases have been accomplished: HALT test sequence, Test plan development, Test bench development, and Functional tests.

So, aiming at each board underwent the same tests with an increasing stress factor for each one of them, the following HALT test sequence has been chosen:

1. Cold Step Stress (CSS)
2. Hot Step Stress (HSS)
3. Rapid Thermal Cycling (TCY)
4. Vibration Step Stress (VIB)
5. Vibration Step Stress + Rapid Thermal Cycling (VIB+TCY)

For each test, the selected temperature and vibration limits have exceeded the operational limits defined by the manufacturer to produce static mechanical stress or generate fatigue stress in the soldering of the boards.

On the other hand, ad-hoc ground support equipment (GSE) has been developed to perform the functional tests needed to determine the criticality of the issue and establish when to stop the tests.

Therefore, for each board, the identified failure modes have been recorded, analyzed, and categorized, in addition, to be compared with the theoretical FMECA, previously created.  Finally, as part of the failure analysis process for those boards that underwent a destructive failure, visual and X-ray inspections have also been used as a preliminary check for excluding cracks, holes, or material separations in their soldering.

In conclusion, the HALT methodology applied to COTS space boards is based on the following key drivers:

• Manufacturer support: To properly identify and analyze the failures that occurred during the HALT tests
• Variables Test thresholds: To adjust the test plan temperature and vibration limits according to the evolution of the tests (at least for the first 2 boards). This should permit to better defining the operating and destruction limits (Lower and Upper) of the boards in each kind of test.
• An iterative testing process for those boards that undergo destructive failures needs the replacement of some components. This should help to understand how to perform potential improvement actions in the design phase of the boards from a cost-benefit viewpoint.
• To categorize the type of failure (systematic, disruptive, critical, FLT errors, test errors, etc…
• To Identify components aging evidence in critical reference components (i.e., Electrical downsized performance, etc..) to ensure that HALT tests have properly jeopardized its reliability.

Speaker: Mario Rueda – ALTER TECHNOLOGY

Electronics Design Manager at Alter Technology TUV Nord S.A.U.

Bespoke for Magnetics Diagnostics (Design, Validation, and Procurement) for ITER

Electronics Design, validation, and procurement of instrumentation amplifiers for STUMM Dones project.

Mario has over 20 years of experience in Electronics Design for the Automotive Industry, holding different positions at automotive TIER1 suppliers across several countries.